Verilog Projects

This page presents all Verilog projects on These Verilog projects are very basic and suited for students to practice and play with their FPGA boards. 

FPGA Verilog Projects

The most popular Verilog project on fpga4student is Image processing on FPGA using Verilog. The Verilog project presents how to read a bitmap image (.bmp) to process and how to write the processed image to an output bitmap image for verification. 

My recommended FPGA Verilog projects are What is an FPGA?, What is FPGA Programming? and Verilog vs VHDL: Explain by Examples. The Verilog projects show in detail what is actually in FPGAs and how Verilog works on FPGA. Students or beginners should read this project before getting started with FPGA design using Verilog/VHDL.

Following are FPGA Verilog projects on

1. What is an FPGA? How Verilog works on FPGA

2. Verilog code for FIFO memory

3. Verilog code for 16-bit single-cycle MIPS processor

4. Programmable Digital Delay Timer in Verilog HDL

5. Verilog code for basic logic components in digital circuits

6. Verilog code for 32-bit Unsigned Divider

7. Verilog code for Fixed-Point Matrix Multiplication

8. Plate License Recognition in Verilog HDL

9. Verilog code for Carry-Look-Ahead Multiplier

10. Verilog code for a Microcontroller

11. Verilog code for 4x4 Multiplier

12. Verilog code for Car Parking System

13. Image processing on FPGA using Verilog HDL

14. How to load a text file into FPGA using Verilog HDL

15. Verilog code for Traffic Light Controller

16. Verilog code for Alarm Clock on FPGA

17. Verilog code for comparator design

18. Verilog code for D Flip Flop

19. Verilog code for Full Adder

20. Verilog code for counter with testbench

21. Verilog code for 16-bit RISC Processor

22. Verilog code for button debouncing on FPGA

23. How to write Verilog Testbench for bidirectional/ inout ports

24. Tic Tac Toe Game in Verilog and LogiSim

25. 32-bit 5-stage Pipelined MIPS Processor in Verilog (Part-1)

26. 32-bit 5-stage Pipelined MIPS Processor in Verilog (Part-2)

27. 32-bit 5-stage Pipelined MIPS Processor in Verilog (Part-3)

28. Verilog code for 5-to-32 Decoder

29. Verilog code for Multiplexers

30. N-bit Adder Design in Verilog

34. Verilog code for PWM Generator

Upcoming Verilog projects will be updated more and more on this page. Keep you up to date with the upcoming Verilog projects on Subscribe here to get FPGA Verilog projects directly to your email.